번역이 없어 중국어 원문을 표시합니다.

작품 · work_ieee_1800_2005

IEEE Std 1800-2005

IEEE Std 1800-2005 是电气电子工程师学会的技术标准,题为“IEEE Standard for SystemVerilog: Unified Hardware Design, Specification and Verification Language”;公开目录标为现行(Active),著录年份为 2005 年。

업데이트 · rev 1 · 다른 이름:1800-2005 1800-2005 - IEEE Standard for SystemVerilog: Unified Hardware Design, Specification and Verification Language

IEEE Std 1800-2005(IEEE Standard for SystemVerilog: Unified Hardware Design, Specification and Verification Language)是电气电子工程师学会的技术标准。公开目录将其标为现行(Active),著录年份为 2005 年,主题领域包括 General Topics for Engineers、Components, Circuits, Devices and Systems[1]。参见IEEE 标准。

관련 항목 읽기

관계 페이지 →

Mentioned in

  • No body mentions yet.

출처

  1. IEEE Std 1800-2005 — IEEE Xplore 题录 · IEEE

    standard_number=1800-2005; status=Active; modifier=

    ↩ ↩
  2. IEEE Xplore All Standards(KBART) · IEEE · 2026-11-01 ↩