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Obras · work_ieee_62142_2005

IEEE Std 62142-2005

IEEE Std 62142-2005 是电气电子工程师学会的技术标准，题为“IEC/IEEE International Standard - Verilog(R) Register Transfer Level Synthesis”；公开目录标为非现行（Inactive），已撤回（Withdrawn），著录年份为 2002 年。

Atualizado · rev 1 · Outros nomes：62142-2005 62142-2005 - IEC/IEEE International Standard - Verilog(R) Register Transfer Level Synthesis

IEEE Std 62142-2005（IEC/IEEE International Standard - Verilog(R) Register Transfer Level Synthesis）是电气电子工程师学会的技术标准。公开目录将其标为非现行（Inactive），已撤回（Withdrawn），著录年份为 2002 年，主题领域包括 General Topics for Engineers、Components, Circuits, Devices and Systems[1]。参见IEEE 标准。

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  1. IEEE Std 62142-2005 — IEEE Xplore 题录 · IEEE

    standard_number=62142-2005; status=Inactive; modifier=Withdrawn

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  2. IEEE Xplore All Standards（KBART） · IEEE · 2026-11-01